In a typical semiconductor fabrication process, integrated circuits are formed on semiconductor substrates using a number of different processing techniques to create the transistors, resistors, capacitors, interconnects, and the various other circuit elements of a semiconductor device. In some processes, portions of the circuit which are designed for a specific functionality are formed separately on a die, and the die is then mounted on a packaging substrate and used to impart that functionality to a host device. The die circuitry is typically accessed from bond pads formed on the final metal layer of the die. Hence, the bond pads provide a means for the transfer of electrical signals and power from and to the die via bonding wires, conductive bumps, and other elements of the conductive pathway formed between the die and the packaging substrate. The packaging substrate, in turn, provides electrical connections between the die and other circuit elements.
In the case of flip chip packaging, the die is equipped with solder balls formed on the bond pads, and is flipped onto the complementing bond pads of the packaging substrate. Thermal processing of the die/package sandwich completes the electrical connection through the formation of solder joints. An under-fill adhesive is typically applied between the die and packaging substrate which, in conjunction with the solder joints, physically bonds the die to the packaging substrate. Frequently, an adhesive fillet is also applied to the sides of the die as an additional bond between the die and the packaging substrate.
FIG. 1 depicts one example of a flip-chip packaged semiconductor device 100 known to the art which illustrates some of the principles described above. The semiconductor device 100 depicted therein comprises a bulk silicon substrate 102 and a buried oxide layer 104 which separates the bulk silicon substrate 102 from the functional device area 106, the later of which may include various functional circuit elements as are known to the art. The functional area of the semiconductor device 100 also includes an edge seal 126 near the edge 124 of the die. This edge seal 126 may be continuous and typically surrounds the entire die or functional device area 106. The edge seal 126 is made of stacked continuous bands or rings of metal that are formed on every metal and via layer of the functional device area.
The continuous bands or rings of edge seal metal are exposed during wafer dicing. This process may result in unintentional damage to the metal structure or dielectric material of the ring, thereby compromising the ability of the ring to seal out moisture and ionic contaminants. This may be especially true when the dielectric material is a low-k dielectric, since these materials are often mechanically weak and permeable to moisture.
A conductive fillet 118, which may comprise a metal epoxy, contacts the edge 124 of the die and is utilized to provide an electrical ground contact between the bulk silicon 102, the functional device area 106 (by way of the exposed edge seal metal), and the substrate 114 by way of a substrate contact pad 116. The device of FIG. 1 is also equipped with a solder bump interconnect 108 that provides electrical contact between the die and the packaging substrate 114 by way of an interconnect bond pad 110 in the die and a packaging bond pad 112 on the packaging substrate 114. The device is further equipped with a polyimide layer 120 and an epoxy underfill 122.
FIG. 2 depicts one example of a conventional wire-bond packaged semiconductor device 201. As seen therein, the device 201 comprises a packaging substrate 203 upon which is mounted a semiconductor die 205. A plurality of solder balls 207 are mounted on one face of the packaging substrate 203 to enable connection thereof to a host device. The die 205 is mounted to the opposing face of the packaging substrate 203 by way of a die attach adhesive 209.
The die 205 is equipped about edge 230 of its upper surface with a row of wire-bond pads 211. The row of wire-bond pads 211 may form a bond pad ring around the perimeter of the upper surface of die 205. The wire-bond pads 211 on the semiconductor die 205 are electrically connected to wire-bond posts 217 on the packaging substrate via bond wires 218. Each individual wire-bond pad 211, and its associated wire-bond post 217 and bond wire 218, may provide either power, ground, or Input/Output (I/O) signal coupling between the die 205 and the packaging substrate 203. An adhesive fillet 226 is provided to further secure the die 205 to the packaging substrate 203. In some cases, the adhesive fillet 226 may be formed of the same material as the die attach adhesive 209. Though not shown, a molding material may be applied to complete the structure.